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TC3W02F 解码器/多路分解器 SOP8 MARKING 3W02F
| 逻辑类型Logic Type | 解码器/多路分解器 Decoder/Demultiplexer |
| 电路数Number of Circuits | |
| 输入数Number of Inputs | |
| 电源电压VccVoltage - Supply | |
| 静态电流IqCurrent - Quiescent (Max) | |
| 输出高，低电平电流Current - Output High, Low | 2~6V |
| 低逻辑电平Logic Level - Low | TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC. 2-TO-3 LINE DECODER WITH ENABLE. The TC3W02 is a high speed C2MOS 2 to 3 LINE DECODER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology.It achieves the high speed operation similar to equivalent LSTTL while maintaining the C2MOS low power dissipation.The active low enable input can be used for gating or it can be used as adata input for demultiplexing applications,When the enbale input is held "H",all three outputs are fixed at a high logic level independent of the other inputs.ALL input are queipped with protection circuits against static discharge or transient exvess voltage. High Speed Low Power Dissipation High Noise Immunity Output Drive Capability Symmetrical Output Impedance Balanced Propagation Delays Wide Operating Voltage Range |
| 高逻辑电平Logic Level - High | 东芝CMOS数字集成电路硅单片。 2到3线译码器具有使能。 TC3W02是一个高速C2MOS的2至3线译码器/多路复用器，用硅栅C2MOS技术制作。它实现了类似等效输入通道的高速操作，而保持C2MOS的低功耗。低电平有效使能输入可以用于门，或它可以被用来作为用于多路复用器的应用程序的威刚输入。当使能输入为“H”，所有三个输出固定在一个高层次的逻辑，其他输入独立。 高速 低功耗 高抗干扰 输出驱动能力 对称的输出阻抗 平衡传输延时 宽工作电压范围 |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | |
| Description & Applications | |
| 描述与应用 |
| 规格书PDF |
